Renesas Electronics RC38x08 FemtoClock®3 Wireless Jitter Attenuators
Renesas Electronics RC38x08 FemtoClock®3 Wireless Ultra-low Phase Noise Jitter Attenuators and Clock Generators include the RC38208 and RC38108 high-performance, small form factor devices. These components are ultra-low phase noise jitter attenuators, multi-frequency clock synthesizers, and digitally controlled oscillators (DCOs). The flexible, low-power RC38x08 devices generate clocks with ultra-low inband phase noise and spurious for 4G/5G RF transceivers and with jitter below 25fs RMS for 112Gbps and 224Gbps SerDes. RC38x08 can manage up to three synchronization domains, supporting CPRI/eCPRI and synchronization methods like IEEE 1588, Synchronous Ethernet (SyncE), GPI, or GNSS. RC38x08 simplifies system clock generation with up to four frequency domains, while integrated LDOs provide superior PSRR, reducing PCB complexity. This simplification makes it an excellent choice for applications such as timing for optical front-end DAC/ADC and DSP, reference clocks for high-speed SerDes, 5G distribution units, and high-performance DCO for PTP-based clocks.Features
- Ultra-low phase noise synthesizer with jitter below 25fs RMS, 12kHz to 20MHz with 4MHz HPF
- Two independent low-phase noise sync domains
- Four independent low-phase noise frequency domains
- Support for JESD204B/C
- Time sync block with time-to-digital converter (TDC), time-of-day (TOD) counter, and PTP clocks
- Eight clock outputs with independent integer dividers
- 6: LVDS, HCSL (AC-LVPECL) or CML
- 2: LVDS, HCSL (AC-LVPECL) or LVCMOS
- Output frequency range
- DC to 2.5GHz for CML
- DC to 1GHz for LVDS or HCSL
- DC to 250MHz for LVCMOS
- Two differential clock inputs configurable as four single-ended clock inputs
- Operates from a 1.8V supply
- Clock inputs tolerate 1.8V input when the device is powered off, sinking less than 1mA
- DC to 1GHz CLKIN input frequency range
- Time Sync TDC supports 1PPS and PP2S inputs
- DPLLs comply with ITU-T G.8262 and G.8262.1
- DPLL input-to-output phase variation of ≤100ps
- DCO frequency resolution of <10-13
- 7mm × 7mm, 64-BGA package
Applications
- Timing for optical front-end DAC/ADC and DSP
- High-performance DCO for Precision Time Protocol (PTP) based clocks
- Reference clock for 112Gbps and 224Gbps SerDes
- 5G distribution units (DU), switches, and routers
Typical Optical Front-End Use Case
RC38108 Block Diagram
RC38208 Block Diagram
Paskelbta: 2024-10-11
| Atnaujinta: 2024-12-02
