Renesas Electronics 8T49N287 FemtoClock NG Octal Frequency Translators
Renesas Electronics 8T49N287 FemtoClock® NG Octal Frequency Translators feature two fractional-feedback PLLs used as jitter and frequency translators. These frequency translators generate up to eight different output frequencies ranging from 8kHz to 1GHz with the help of six integers and two fractional output dividers. The eight different outputs can be selected among LVPECL, LVCMOS, LVDS, or HCSL output levels. The 8T49N287 frequency translators support hitless reference switching between input clocks. These frequency translators monitor all input clocks for Loss of Signal (LoS) and generate an alarm when an input clock failure is detected. Typical applications include 1G, 10G, 40G, and 100G synchronous Ethernet, SONET/SDH, wireless base station baseband, data communications, and OTN de-mapping.Features
- Supports SDH/SONET and Synchronous Ethernet clocks, including all FEC rate conversions
- <0.3ps RMS Typical jitter (including spurs), 12kHz to 20MHz
- Locked to input signal, holdover, and free-run operating modes
- ±50ppb initial holdover accuracy
- Accepts up to two LVPECL, LVDS, LVHSTL, HCSL, or LVCMOS input clocks:
- Accepts frequencies ranging from 8kHz up to 875MHz
- Auto and manual input clock selection with hitless switching
- Clock input monitoring, including support for gapped clocks
- Phase-slope limiting and fully hitless switching options to control output phase transients
- Operates from a 10MHz to 40MHz fundamental-mode crystal
- Generates 8 LVPECL/LVDS/HCSL or 16 LVCMOS output clocks:
- 8kHz up to 1.0GHz (diff) output frequencies
- 8kHz to 250MHz (LVCMOS) output frequencies
- Four GPIO pins with optional support for status and control:
- Four output enable control inputs may be mapped to any of the eight outputs
- Lock, holdover, and Loss-of-Signal status outputs
- Open-drain interrupt pin
- Nine programmable loop bandwidth settings from 1.4Hz to 360Hz for each PLL
- Optional Fast Lock function
- Programmable output phase delays in steps as small as 16ps
- Register programmable through I2C or via external I2C EEPROM
- Bypass clock paths for system tests
- -40°C to +85°C ambient operating temperature
- 56QFN, lead-free (RoHS 6) package
Applications
- OTN or SONET / SDH equipment Line cards (up to OC-192, and supporting FEC ratios)
- OTN de-mapping (Gapped Clock and DCO mode)
- Gigabit and Terabit IP switches/routers including support of Synchronous Ethernet
- SyncE (G.8262) applications
- Wireless base station baseband
- Data communications
- 100G Ethernet
Block Diagram
Paskelbta: 2019-11-11
| Atnaujinta: 2024-04-05
