Toshiba TC358778XBG Parallel Port to MIPI DSI
Toshiba TC358778XBG Parallel Port to MIPI Display Serial Interface (DSI) is a bridge device that converts RGB to DSI. All internal registers can be accessed through I2C or SPI. The Toshiba TC358778XBG Parallel Port to MIPI DSI defines a high-speed serial interface between a peripheral, such as an active-matrix display module, and a host processor in a mobile device. This feature allows an engineer to provide higher performance, lower power, less electromagnetic interference, and fewer pins than current devices while maintaining compatibility across products from multiple suppliers.Features
- DSI-TX interface:
- MIPI® DSI compliant (Version 1.02.00):
- Support DSI video mode data transfer
- DCS command for panel register access
- Supports up to 1Gbps per data lane
- Supports 1, 2, 3, or 4 data lanes
- Supports video data formats
- RGB888/666/565
- MIPI® DSI compliant (Version 1.02.00):
- RGB interface
- Supports data formats
- 24-bit data bus
- RGB888/666/565 data formats
- 24-bit data bus
- Up to 166MHz input clock
- Supports VSYNC/HSYNC polarity option (default LOW)
- Supports DE polarity option (default HIGH)
- Supports data formats
- I2C/SPI slave interface (option to select either I2C or SPI interface)
- I2C interface (when CS=L)
- Support for normal (100KHz), fast mode (400kHz), and special mode (1MHz)
- Configure all TC358778XBG internal registers
- Writing to DCS registers will trigger DCS Command transmits over DSI
- SPI interface (when CS=H):
- SPI interface support for up to 25MHz operation
- Configure all TC358778XBG internal registers
- Writing to DCS registers will trigger DCS command transmits over DSI
- I2C interface (when CS=L)
- GPIO signals
- 2 GPIO signals
- Two GPIO signals can be configured as SPI signals (SPI_SS and SPI_MISO)
- Or one GPIO signal can be configured as an interrupt output signal, INT
- 2 GPIO signals
- System
- Clock and power management support to achieve low power states
- Power supply inputs
- Core and MIPI® D-PHY: 1.2V
- I/O: 1.8V - 3.3V
- Typical power consumption
- WXGA @60fps: Pixel Clk: 74.25MHz, DSIClk: 312MHz -> 66.7mW
- 1080P @60fps: Pixel Clk: 148.5MHz, DSIClk: 471MHz -> 91.4mW
- Power down condition is achieved by turning off clock sources: PClk and RefClk
Applications
- Smartphone
- Tablet
- Ultrabook
System Overview
Paskelbta: 2015-07-07
| Atnaujinta: 2022-03-11
