Texas Instruments TPS51200A-Q1 DDR Termination Regulator
Texas Instruments TPS51200A-Q1 DDR Termination Regulator is specifically designed for low input voltage, low-cost, low-noise systems where space is crucial. The device maintains a fast transient response and only requires a minimum output capacitance of 20µF. TPS51200A-Q1 supports a remote sensing function and all power requirements for DDR, DDR2, DDR3, Low Power DDR3, and DDR4 VTT bus termination.
In addition, the device provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications. Texas Instruments TPS51200A-Q1 is available in the thermally-efficient VSON-10 package and is rated green and Pb-free. The device is specified from –40°C to 125°C.
Features
- AEC-Q100 qualified for automotive applications
- Device Temperature Grade 1 (–40°C ≤ TA ≤ 125°C)
- Device HBM ESD Classification Level 2
- Device CDM ESD Classification Level C4B
- Extended reliability testing
- Input voltage supports 2.5V rail and 3.3V rail
- 1.1V to 3.5V VLDOIN voltage range
- Sink and source termination regulator includes droop compensation
- Requires minimum output capacitance of 20µF (typically 3 × 10µF MLCCs) for memory termination applications (DDR)
- PGOOD to monitor output regulation
- EN input
- REFIN input allows for flexible input tracking either directly or through resistor divider
- Remote sensing (VOSNS)
- ±10mA buffered reference (REFOUT)
- Built-in soft-start, UVLO, and OCL
- Thermal shutdown
- Meets DDR, DDR2 JEDEC specifications; supports DDR3 and low-power DDR3 and DDR4 VTT applications
- VSON-10 package with exposed thermal pad
Applications
- Memory termination regulator for DDR, DDR2, DDR3, and low power DDR3/DDR4
- Notebook, desktop, server
- Telecom and datacom, GSM base station, LCDTV and PDP-TV, copier and printer, set-top box
Functional Block Diagram
Paskelbta: 2019-03-19
| Atnaujinta: 2025-03-11