Texas Instruments SN74AVC2T45/SN74AVC2T45-Q1 Bus Transceivers

Texas Instruments SN74AVC2T45/SN74AVC2T45-Q1 Dual-Bit Dual-Supply Bus Transceivers are 2-bit non-inverting bus transceivers that use two separate configurable power-supply rails. The A ports are designed to accept any supply voltage from 1.2V to 3.6V to track VCCA. The B ports are designed to accept supply voltage from 1.2V to 3.6V and track VCCB. This allows for universal low-voltage bidirectional translation and level-shifting between 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.

The SN74AVC2T45/SN74AVC2T45-Q1 are designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR pin) input activate either the A-port outputs or B-port outputs. When the B-port outputs are activated, the device transmits data from the A bus to the B bus. It also transmits from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must apply a logic HIGH or LOW level to prevent excess leakage current on the internal CMOS structure. The Texas Instruments SN74AVC2T45-Q1 devices are AEC-Q100 qualified for automotive applications.

Features

  • Available in the Texas Instruments NanoFree™ package
  • VCC isolation feature (if either VCC input is at GND, both ports are in the high-impedance state)
  • Dual supply rail design
  • I/Os are 4.6V over voltage tolerant
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • Max data rates
    • 500Mbps (1.8V to 3.3V)
    • 320Mbps (< 1.8V to 3.3V)
    • 320Mbps (level-shifting to 2.5V or 1.8V)
    • 280Mbps (level-shifting to 1.5V)
    • 240Mbps (level-shifting to 1.2V)
  • ESD protection exceeds JESD 22

Applications

  • Smartphones
  • Servers
  • Desktop PCs and notebooks
  • Other portable devices

Functional Block Diagram

Block Diagram - Texas Instruments SN74AVC2T45/SN74AVC2T45-Q1 Bus Transceivers
Paskelbta: 2024-12-10 | Atnaujinta: 2025-08-01