The TI LMX1860SEPEVM can buffer RF clocking inputs up to 18GHz, multiply by two, three, or four in the output range of 3.2GHz to 6.4GHz, and divide inputs by up to eight. The device offers an individual auxiliary clock divider for field-programmable gate arrays (FPGAs) and logic clocking. Each output incorporates a system reference (SYSREF) complement with picosecond precision and delay tuning capability. Multiple LMX1860SEPEVM can be synchronized for expansive clock distribution trees.
Features
- 18GHz buffer, up to 6.4GHz multiplier, and divided by up to eight
- -160dBc/Hz noise floor at 6GHz
- Four RF output and SYSREF pairs
- Supports multiple-device synchronization
- SYSREF generator with per-output picosecond precision delay tuning capability
- Auxiliary divider for FPGA and logic with SYSREF
Applications
- Aerospace and defense:
- Radar
- Electronic warfare
- Seeker front end
- Phased array antenna/beam forming
- General purpose:
- Data converter clocking
- Clock distribution/multiplication/division
Specifications
Kit Contents
- One LMX1860-SEP EVM board (DC247) with integrated USB2ANY controller
- One USB cable
Layout
Paskelbta: 2024-07-17
| Atnaujinta: 2024-07-23

