Texas Instruments DAC39RF20EVM Evaluation Module
Texas Instruments DAC39RF20EVM Evaluation Module evaluates the DAC39RF20 family of digital-to-analog converters in multiple modes and configurations. The board provides two balun-coupled networks per DAC output for single-ended signal evaluation, onboard clock distribution, external clock support, and an FMC+ connector for high-speed serial data connections.
The TI DAC39RF20EVM works with the TSW14J59EVM pattern generator card for full JESD204C testing of all 16 lanes. A USB connection and software interface support DAC and LMK04828 configuration through SPI, while the FMC+ connector also supports programming from an FPGA. The module is designed for evaluating DAC performance, output networks, clocking, serial interfaces, and digital operating modes.
Features
- Two balun-coupled output networks per DAC output for single-ended signal evaluation
- LMK04828 clock distribution device
- Distributes FPGA reference clocks and SYSREF for subclass 1 operation
- Balun-coupled clock input network for testing with an external low-noise clock source
- FMC+ connector with high-speed serial data connections
- Supports full JESD204C testing of all 16 lanes
- USB-to-serial interface
- Supports DAC and LMK04828 programming through a USB connection
- Uses an FTDI USB-to-SPI bus translator
- FPGA programming support through the FMC+ connector
- Graphical user interface for DAC and onboard clock configuration
Specifications
- DAC sampling rate of up to 22GSPS
- Low-band balun frequency range of 5MHz to 10GHz
- High-band balun frequency range of 2GHz to 18GHz
- 16-bit single-channel real-data support at 22GSPS
- 12-bit dual-channel real-data support at 21GSPS
- Complex bandwidth of up to 4.4GHz
- 16 JESD204C lanes
- 12VDC at 3A external evaluation-module power requirement
Required Equipment
- TSW14J59EVM data capture and pattern generator board with related items
- Not required when the DAC39RF20EVM is used only in direct digital synthesis mode
- PC running Microsoft Windows 10 or higher
- Low-phase-noise signal generator for the DEVCLK sampling clock
- Three SMA-type low-loss cables
- Additional signal generator for FPGA reference-clock generation
- Both signal generators must use a common 10MHz reference
- Two low-noise power supplies
- 12V at 5A for the TSW14J59EVM
- 12V at 3A for the DAC39RF20EVM
Required Software
- DAC39RF20EVM Configuration GUI software package
- DAC39RF20EVM GUI
- J59 Commander
- DAC WaveGen
- J59 Server
- Vivado Lab Tools 2024.2
Kit Contents
- DAC39RF20EVM evaluation board
- USB Type-C® to USB-A cable
- Power cable
Associated Cleaner
Texas Instruments LMK0482x Synthesizer & Jitter Cleaner
High-performance clock conditioner with JEDEC JESD204B support.
Key Components
Test Setup
